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Issue Int. J. Simul. Multi. Design Optim.
Volume 3, Number 3, July 2009
Page(s) 406 - 410
DOI 10.1051/ijsmdo/2009016
Published online 21 October 2009

Int. J. Simul. Multidisci. Des. Optim. 3, 406-410 (2009)
DOI: 10.1051/ijsmdo/2009016

Fault Tolerant Control: Application of GIMC structure to a PLL Identi-fier Module

Thabet Assem1, 2, Hamdaoui Rim1, 2 and Abdelkrim M.N1, 2

1  Unit Modeling, Analyzes and Control of Systems (MACS), Street Omar Iben Elkhattab Zrig-6029-Gabés (Tunisia)
2  National School of Engineers of Gabés, Street Omar Iben Elkhattab Zrig-6029-Gabés (Tunisia)


Received 14 May 2009, Accepted 17 August 2009; published online 21 October 2009

Abstract
In this paper, we present a study dealing with stabilizing and robust controllers synthesis, precisely the Fault Tolerant Control (FTC). The case where these controllers are calculated by GIMC (Generalized Internal Model Control) structure will be developed and applied to a Phase-locked Loop (PLL) Identifier Module. In each case, we will focus on the control and the system output evolutions in the defects event. We will show the control quality and the advantages offered by GIMC structure in the transitory mode and the permanent one.



Key words: Fault Tolerant Control -- stability -- residue -- GIMC structure -- Phase Locked Loop (PLL)

Correspondence: assem.thabet@yahoo.fr


© ASMDO 2009


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